1. Field of the Invention
The invention relates to an automatic gain controller. More particularly, the present invention relates to an automatic gain controller that receives an input signal and can output an output signal with the amplitude maintained constant, without using an operational amplifier for shifting the direct current (DC) level of the output signal.
2. Description of the Related Art
An optical disk may be classified into a write-once disk such as a CD-ROM and a DVD-ROM, and a rewritable disk such as a CD-RW, a DVD-RW, and a DVD-RAM. The rewritable disk cannot generate a clock signal from a reproduced signal, unlike an existing read-only disk. Accordingly, grooves of the disk on which information is recorded are wobbled for a predetermined period, and a clock signal required for a recording operation is generated by detecting this wobble signal.
FIG. 1 is a block diagram of a conventional wobble signal reproducing apparatus, and FIGS. 2 A-C are views illustrating a wobble signal reproducing process performed by the apparatus of FIG. 1.
As shown in FIG. 1, wobble signals are measured at regions A, B, C and D on a disk 10. Quantities of light corresponding to the wobble signals measured at the regions A and D are added together by an adder 20a, and quantities of light corresponding to the wobble signals measured at the regions B and C are added together by an adder 20b. A signal A+D outputted from the adder 20a and a signal B+C outputted from the adder 20b have RF signals having the same phase and wobbling signals having a phase difference of 180° with each other as shown in FIGS. 2A and 2B. The signal A+D and the signal B+C are filtered by high-pass filters (HPF) 30a and 30b having a cutoff frequency enough to pass the wobble signals, respectively, and thus DC offsets thereof are eliminated.
Then, by performing the operation of (A+D)−(B+C), the RF signal that is the in-phase component is eliminated, and the wobble signal that is the inverse-phase component is extracted. Since the amplitude of the RF signal contained in the signals A+D and B+C is varied due to the sensitivity imbalance of a photo detector and mismatching of each channel, it is required to compensate for the varied amplitude of the RF signal. Accordingly, automatic gain controllers (AGC) 40a and 40b compensate for the amplitude of the RF signal constantly, in order to prevent leakage of the RF signal due to the wobble signal.
A subtracter 50 subtracts the signal B+C from the signal A+D, which are gain-adjusted by the automatic gain controllers 40a and 40b, to output the wobble signal as shown in FIG. 2C. A band-pass filter (BPF) 60 having a narrow band detects a wobble signal having a high signal-to-noise ratio (S/N) from the output wobble signal, and after the automatic gain controller (AGC) 70 amplifies the gain of the wobble signal, a comparator 80 quantizes the wobble signal and outputs a wobble clock signal.
The construction of the automatic gain controller capable of consistently compensating for and outputting the amplitude of a desired input signal will now be described.
FIG. 3 is a view illustrating the construction of a conventional automatic gain controller, and FIGS. 4A through 4B are views illustrating waveforms of the signal from each terminal of the automatic gain controller shown in FIG. 3.
Referring to FIG. 3, an automatic gain controller 40a includes a variable gain amplifier (VGA) 41, a high-pass filter (HPF) 42, a signal level detection unit 43, and a comparison unit 44.
The variable gain amplifier 41 amplifies an input signal Vin with a predetermined amplification gain a according to a control voltage Vcontrol input from the comparison unit 44, and outputs a first differential signal Vp′, a second differential signal Vn′ having a 180° phase difference from the first differential signal Vp′, and an output signal Vout obtained by subtracting the second differential signal Vn′ from the first differential signal Vp′. Here, the gain α is increased in proportion to the control voltage Vcontrol, and the input signal Vin has a voltage Vref as a DC level.
The high-pass filter (HPF) 42 shifts DC levels of the first differential signal Vp′ and the second differential signal Vn′ to the DC level Vref of the input signal Vin to output the DC-level-shifted differential signals.
The signal level detection unit 43 full-wave-rectifies first and second differential signals Vp and Vn, and extracts a DC component from the full-wave-rectified signal Vfr to output the extracted DC component. More specifically, the signal level detection unit 43 includes a full-wave rectifier 43-1 and a low-pass filter 43-2.
The full-wave rectifier 43-1 full-wave-rectifies the first differential signal Vp and the second differential signal Vn which are output from the high-pass filter 42. The low-pass filter 43-2 extracts the DC component from the signal Vfr full-wave-rectified by the full-wave rectifier 43-1.
The magnitude of the output voltage V_lpf of the low-pass filter 43-2 will now be described with reference to FIGS. 4A through 4F. When the input signal Vin, of which the magnitude of the peak-peak voltage is A (FIG. 4A), is input to the variable gain amplifier 41, the magnitude of the peak-to-peak voltage of the output signal Vout becomes 2αA (FIG. 4B), and the magnitude of the peak-to-peak voltage of the first differential signal Vp (FIG. 4C) and the second differential signal Vn becomes αA (FIG. 4D). The magnitude of the DC component of the full-wave-rectified signal Vfr (FIG. 4E) becomes a value obtained by adding the DC level Vref to a value αA/√{square root over (2)} which is obtained by adding an effective value αA/2√{square root over (2)} of an AC component of the first differential signal Vp to an effective value αA/2√{square root over (2)} of an AC component of the second differential signal Vn. That is, the magnitude of the DC component of the full-wave-rectified signal Vfr becomes Vref+(αA/√{square root over (2)}), which is equal to the magnitude of the output voltage V_lpf of the low-pass filter 43-2, as shown in FIG. 4F. The reference voltage Vref added to the effective value αA/√{square root over (2)} of the AC component of the output signal Vout makes Vref+(αA/√{square root over (2)}), which is equal to the magnitude of the DC component of the full-wave-rectified signal Vfr.
The comparison unit 44 receives the output voltage V_lpf of the low-pass filter 43-2 and a reference voltage V_level and compares them with each other. If the output voltage V_lpf of the low-pass filter 43-2 is lower than the reference voltage V_level, the comparison unit 44 increases the gain of the variable gain amplifier 41 by heightening the control voltage Vcontrol. Thus, the peak-peak voltage of the output signal Vout is increased.
By contrast, if the output voltage V_lpf of the low-pass filter 43-2 is higher than the reference voltage V_level, the comparison unit 44 decreases the gain of the variable gain amplifier 41 by lowering the control voltage Vcontrol. Thus, the peak-to-peak voltage of the output signal Vout is decreased. If the output voltage V_lpf of the low-pass filter 43-2 reaches the reference voltage V_level, the output signal Vout is output with a constant magnitude of the peak-peak voltage.
In order to output the peak-to-peak voltage of the output signal Vout as Vpp, the comparison unit 44 controls the reference voltage V-level to have a magnitude of Vref+(Vpp/2√{square root over (2)}). Here, Vpp/2√{square root over (2)} is an effective value of a target peak-peak voltage Vpp of the output signal Vout.
FIG. 5 is a view illustrating the detailed construction of a signal level detection unit in FIG. 3. FIGS. 6A through 6E are views illustrating signal waveforms appearing at respective points of the signal level detection unit in FIG. 3.
Referring to FIGS. 5 and 6A through 6E, the signal level detection unit 43 includes the full-wave rectifier 43-1 composed of first through third transistors Qn1, Qn2, and Qn3 and an operational amplifier OP-Amp, and the low-pass filter 43-2 composed of a resistor R and a capacitor C.
The pair of the first and second transistors Qn1 and Qn2 full-wave-rectify the first and second differential signals Vp (FIG. 6B) and Vn (FIG. 6A). The DC level Vref′ of the signal VA (FIG. 6C) outputted from the first and second transistors Qn1 and Qn2 is lowered as much as the DC voltage VGS between the gates and sources of the first and second transistors Qn1 and Qn2 from the reference voltage Vref. Here, Vref′=Vref−VGS. The operational amplifier OP-Amp and the third transistor Qn3 increase the DC level of the full-wave-rectified signal VA as mush as VGS. Accordingly, the DC level of the signal VB (FIG. 6D) inputted to the low-pass filter 43-2 becomes again Vref, and finally the signal V_lpf (FIG. 6E) outputted from the low-pass filter 43-2 becomes Vref.
The conventional automatic gain controller employs the operational amplifier OP-Amp in order to shift the DC level of the full-wave-rectified signal VA to Vref. However, random offset voltages exist in the operational amplifier due to the mismatching of a manufacturing process. In fact, there is a problem in that the offset voltage is generally in the range of several tens of mV.
Accordingly, supposing that the offset voltage of the operational amplifier used in the conventional automatic gain controller is 50 mV, an error of the peak-peak voltage of the output signal from the automatic gain controller leads to about 140 mV, which lowers the precision remarkably. Also, since the random offset voltage of the operational amplifier has a different value for every chip, varied imprecision among different chips results.